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fedl2201-01 1 semiconductor this version: mar. 2000 ML2201-XXX speech synthesizer lsi with on-chip 384k mask rom 1/20 general description the ml2201 is a pcm-based speech synthesizer lsi having an on-chip 384k mask rom, d/a converter and low pass filter. utilizing the serial interface enables smaller footprint packaging, which makes the chip an ideal choice for a pre-recorded message subsystem used with today?s size-critical applications. features ? sampling frequency (selectable for each single phrase) 4.0/5.3/6.4/8.0/10.6/12.8/16.0 khz ? on-chip 384 kbit mask rom ? maximum playback time (at f extclk = 4.096 mhz) 12.0 sec at f sam = 4.0 khz 6.0 sec at f sam = 8.0 khz 3.0 sec at f sam = 16.0 khz ? external clock frequency range * f extclk = 3.5 to 4.096 mhz (typ.) to 17.0 mhz ? on-chip phrase control table ? maximum number of phrases: 31 phrases ? built-in 10-bit current-output type d/a converter ? built-in lpf ? packaging: 8-pin plastic ssop (ssop8-p-44-0.65-k) (product code: ML2201-XXX mbz060) ? power supply voltage: +2.0 to +5.5 v * note: as of february 2000, ceramic oscillation on this chip is under development and thus the chip is not functional with a ceramic oscillator. the manufacturer intends to add a ceramic oscillation option to the chip. for more information on availability in commercial quantity, contact your sales representative.
fedl2201-01 1 semiconductor ml2201?xxx 2/20 pin layout (top view) gnd aout xt v dd 1 2 3 4 8 7 6 5 pdwn xt st pi 8-pin plastic ssop block diagram aout gnd v dd pdwn 384 kbit rom 10 bit dac lpf xt 16 bit address controller xt st pi osc circuit 10 timing controller serial interface 8 8 pcm data area 378 kbit edit rom 2 kbit (phrase control table) address rom 2 kbit (phrase address table) test rom 2 kbit 8 5 reset, power down 16 pcm synthesizer
fedl2201-01 1 semiconductor ml2201?xxx 3/20 pin description pin no. pin name i/o description 1 st i the playback trigger pin. the number of pulses input to the pi pin, while this pin is held ?l?, determines the phrase address for playback. at the st ?s rising edge, the phrase address data is loaded into the lsi and playback starts. when no pulse input to pi occurs while this pin is held ?l?, the lsi recognizes it as the ?stop code? that results in stopping playback. 2 pi i the address input pin. the number of pulses input to this pin, while the st pin is held ?l?, determines the phrase address for playback. when 32 pulses are input, the internal counter returns to its initial value, ?0?. 3 gnd ? the ground pin. 4aouto the analog output pin. configured as n-mos open drain, analog signal is output in the form of change in output (attraction) current. while the pdwn pin being held ?h?, this pin is sustained at 1/2 level and thus the current keeps on flowing. when shifting to standby state and shifting back to ready state from standby, the pop-noise canceller is put to work. 5v dd ? the power supply pin. insert a 0.1 f bypass capacitor between this pin and the gnd pin. 6xti the external clock input pin. the ceramic resonator connection pin for ceramic oscillation option under development. 7 xt o keep this pin open. the lsi?s operations may become unstable if this pin includes any capacitive component. the ceramic resonator connection pin for ceramic oscillation option under development. 8 pdwn i the power down pin. the lsi stays standby state while the pin being held ?l?.
fedl2201-01 1 semiconductor ml2201?xxx 4/20 absolute maximum ratings (gnd = 0 v) parameter symbol condition rating unit power supply voltage v dd ?0.3 to +7.0 v input voltage v in ta = 25c ?0.3 to v dd +0.3 v storage temperature t stg ? ?55 to +150 c power drain allowance pd ta = 25c 250 mw recommended operating conditions (gnd = 0 v) parameter symbol condition range unit f extclk = 3.5 to 4.5 mhz +2.0 to +5.5 v f extclk = 3.5 to 13.5 mhz +2.6 to +5.5 v power supply voltage v dd f extclk = 3.5 to 17.0 mhz +3.0 to +5.5 v min. typ. max. mhz v dd = 2.0 to 5.5 v 3.5 4.096 4.5 v dd = 2.6 to 5.5 v 3.5 ? 13.5 v dd = 2.7 to 5.5 v 3.5 ? 14.5 external clock frequency f extclk v dd = 3.0 to 5.5 v 3.5 ? 17.0 operating temperature t op ? ?40 to +85 c
fedl2201-01 1 semiconductor ml2201?xxx 5/20 electrical characteristics dc characteristics v dd = 2.0 to 5.5 v, gnd = 0 v, f extclk = 4.096 mhz, ta = ?40 to +85c (unless otherwise specified) parameter symbol condition min. typ. max. unit f extclk > 14.5 mhz v dd = 3.0 to 5.5 v v dd 0.85 ??v f extclk 14.5 mhz v dd = 2.7 to 5.5 v v dd 0.8 ??v f extclk 13.5 mhz v dd = 2.6 to 2.7 v v dd 0.85 ??v ?h? input voltage v ih f extclk 4.5 mhz v dd = 2.0 to 5.5 v v dd 0.8 ??v f extclk > 14.5 mhz v dd = 3.0 to 5.5 v ?? v dd 0.15 v f extclk 14.5 mhz v dd = 2.7 to 5.5 v ?? v dd 0.2 v f extclk 13.5 mhz v dd = 2.6 to 2.7 v ?? v dd 0.15 v ?l? input voltage v il f extclk 4.5 mhz v dd = 2.0 to 5.5 v ?? v dd 0.2 v ?h? input current i ih v ih = v dd ??10 a ?l? input current i il v il = gnd ?10 ? ? a v dd = 5.5 v f extclk = 4.096 mhz ?1.73.9ma v dd = 3.0 v f extclk = 4.096 mhz ?0.92.1ma v dd = 2.0 v f extclk = 4.096 mhz ?0.51.4ma v dd = 5.5 v f extclk = 16 mhz ? 4.6 12.0 ma supply current i dd except aout output current v dd = 3.0 v f extclk = 16 mhz ?1.86.5ma ta = ?40 to +70 c??10 a standby current i ds ta = ?40 to +85c ? ? 50 a v dd = 2.0 to 5.5 v 0.5 ? 10.0 ma v dd = 5.5 v 4.3 6.8 10.0 ma v dd = 3.0 v 1.4 2.7 3.9 ma aout output current i aout at max. output current v dd = 2.0 v 0.5 1.2 2.2 ma
fedl2201-01 1 semiconductor ml2201?xxx 6/20 ac characteristics v dd = 2.0 to 5.5 v, gnd = 0 v, f extclk = 4.096 mhz, ta = ?40 to +85c (unless otherwise specified) parameter symbol condition min. typ. max. unit clock oscillation duty cycle f duty ? 405060 % reset input time after powering up t rst ?10?? s pdwn hold time after reset input t pdh ?10?? s d/a converter transit time (pop-noise canceller work time) note *1 t dar , t daf ? 606468ms pdwn ? st setup time t pdss ?1?? s st ? pi setup time t sps ?1?? s pi pulse width t pw ? 0.35 ? 2000 s pi cycle time t pc ? 0.7 ? 4000 s st ? pi hold time t sph ?1?? s st ? aout setup time note *2 t sas at f sam = 8.0 khz ? 1050 s phrase stop time note *2 t dps at f sam = 8.0 khz ? 700 s silence time between phrases note *2 t bln at f sam = 8.0 khz ? 700 s stop st pulse width t ssw ? 0.35 ? 2000 s phrase st ? phrase st pulse duration note *2 t pp at f sam = 8.0 khz 1050 ? ? s phrase st ? stop st pulse duration note *2 t ps at f sam = 8.0 khz 1050 ? ? s stop st ? phrase st pulse duration note *2 t sp at f sam = 8.0 khz 500 ? ? s sampling frequency note *3 f sam ? 3.9 ? 28.0 khz note *1: the value changes in proportion to the external clock frequency, f extclk . note *2: the value changes in proportion to the sampling frequency, f sam . note *3: the sampling frequency is determined by the external clock frequency, f extclk , and the dividing factor that is selected for each phrase.
fedl2201-01 1 semiconductor ml2201?xxx 7/20 timing diagrams timing diagram at powering on v dd pdwn t rst t pdh st pi reset power down note: the lsi?s reset operation can be performed by using a level input combination of pdwn = ?l?, st = ?l? and pi = ?h?. after powering on, the initial reset operation is required at the above timing. timing diagram at powering up and standby state pdwn aout 1/2 i aout t dar t daf timing diagram for playback pdwn st pi ...... t pdss t sps aout t sph t sas t pw t pc
fedl2201-01 1 semiconductor ml2201?xxx 8/20 timing diagram on re-addressing while playing s t pi t dps t bln aout stop playing the current phrase start playing the next phrase t pp timing diagram on stop code input s t pi t dps aout stop playing the current phrase t ps t sp t ssw
fedl2201-01 1 semiconductor ml2201?xxx 9/20 functional description sampling frequency you can select a sampling frequency for each phrase address from the following list while you are working on sound data. select a sampling frequency that satisfies f sam = 3.9 to 28.0 khz from the values obtained with the dividing factors as shown in the table 1 below. table 1 sampling frequency sampling frequency at f extclk = 4.096 mhz dividing factor 4.0 khz f extclk /1024 5.3 khz f extclk /768 6.4 khz f extclk /640 8.0 khz f extclk /512 10.6 khz f extclk /384 12.8 khz f extclk /320 16.0 khz f extclk /256 memory allocation and playback time length as shown in the figure 1, the on-chip mask rom of ml2201 is partitioned into four areas, phrase control table, address control table, test data area and user?s data area. the actual data area where user?s sound data can be stored is 378 kbit, that is the total on-chip mask rom capacity minus 6 kbit. phrase control table area address control table area test data area user?s sound data area 2 kbit 2 kbit 2 kbit 378 kbit figure 1 on-chip mask rom (384 kbit) memory allocation
fedl2201-01 1 semiconductor ml2201?xxx 10/20 you can calculate playback time length with memory size divided by a bit rate. the following formula can be used for 8-bit pcm-based ml2201; playback time (sec) = = for example, when you store all phrases at 8.0 khz sampling frequency, the maximum playback time is calculated as follows; playback time (sec) = ? 6.0 sec playback algorithm ml2201 uses oki non-linear pcm algorithm, an advanced variation of pcm. in mid-range wave-form, this algorithm has precision and quality equivalent to those of 10-bit straight pcm. inserting silence in addition to playing normal recorded sound phrases, ml2201 allows you to insert silence (a silent phrase) . you can define time length of silence freely in 32 ms steps, within the range of minimum 32 ms and maximum 992 ms at f extclk = 4.096 mhz. those time length vary in proportion to the external clock frequency, f extclk . phrase control table the user-definable on-chip phrase control table feature enables you to play back multiple phrases in a single continuous session with just the same simple control as in a regular single phrase playback. you can assign up to 8 phrases including a silent phrase (s) to a single address. this allows you to get the most out of limited memory space because you can eliminate duplicate sound data. as an example, let?s assume you want to create several similar phrases like ?it will be xxxxx today?. ?xxxxx? can be ?sunny?, ?rainy? or ?cloudy?. the common words such as ?it?, ?will be? and ?today? are created separately as an independent phrase, and phrasing order information is stored in the phrase control table, as shown in the table 2 and figure 2.1. from the external control, simply selecting an x address causes the lsi to play multiple phrases continuously. in this example shown in the table 2, selecting [01] address starts to play ?it will be fine today, while selecting [02] ?it will be rainy today?. you can also insert a silent phrase to the phrase control table without consuming any memory space. minimum time length of silence 32 ms maximum time length of silence 992 ms incremental step 32 ms memory size (bit) bit rate (bps) memory size (bit) ext. clock frequency (hz) 8 (384 ? 6) 1024 bit 8000 (hz) 8 bit
fedl2201-01 1 semiconductor ml2201?xxx 11/20 table 2 phrase control table data no. x address (hex) y address (phrasing order) (up to 8 phrases) playback 1 01 [01] [02] silence [04] [03] it will be (silence) fine today. 2 02 [01] [02] silence [05] [03] it will be (silence) rainy today. 3 03 [01] [02] [04] [09] [06] [0a] [05] [03] it will be fine, later cloudy, occasionally rainy. :: : 30 1 e 31 1 f phrase control table data address control table data no. x address phrasing order no. y address phrase 1 01 1 [01] ?it? 1 01 it 2 02 2 [02] ?will be? 2 02 will be 3 03 3 silence (64 ms) 3 03 today 4 04 4 [05] ?rainy? 4 04 fine 5 05 5 [03] ?today? 5 05 rainy 6 06 6 ? 6 06 cloudy 7 07 7 ? 7 07 snowy 8 08 8 ? 8 08 occasionally 9 09 later 10 0a in some area set length of silence (32 ms n) n length of silence 1 32 ms 2 64 ms : : : : : : :: : : : : : : : : : 31 1f 31 992 ms 31 1f ? time unit of silence varies in proportion to the dividing factor of f extclk . figure 2.1 phrase data combination for use with phrase control table
fedl2201-01 1 semiconductor ml2201?xxx 12/20 figure 2.2 timing diagram for playback with phrase control table function s t p i aou t v dd pdw n it will be fine today, later occasionally... it will be???. reset power down shifting to standby playing playing playing 1st phrase playing stop playing the earlier phrase stop playing stop code power down 1st phrase 3rd phrase 2nd phrase 1st phrase 3rd phrase 2nd phrase 1st phrase it will be rainy today it will be fine today shifting to standby
fedl2201-01 1 semiconductor ml2201?xxx 13/20 external clock input the figure 3 shows wiring of an external timing source. (a type of the external clock should be determined at selecting chip options.) xt an external timing source keep this pin open xt figure 3 external clock input * note: as of july 1999, ceramic oscillation on this chip is under development and thus the chip is not functional with a ceramic oscillator. the manufacturer intends to add a ceramic oscillation option to the chip. for more information on availability in commercial quantity, contact your sales representative.
fedl2201-01 1 semiconductor ml2201?xxx 14/20 low pass filter ml2201?s analog output goes through the built-in low pass filter. the figure 4 below shows frequency characteristics and the table 3 shows cut-off frequency of the lpf. the lpf?s frequency characteristics and cut-off frequency change in proportion to the sampling frequency. no analog output directly from the d/a converter is unavailable on this chip. 20 10 0 ?10 ?20 ?30 ?40 ?50 ?60 ?70 ?80 10 100 1 k 10 k [hz] [db] figure 4 lpf frequency characteristics (f sam = 8.0 khz) table 3 lpf cut-off frequency sampling frequency (khz) (f sam ) cut-off frequency (khz) (f cut ) 4.0 1.2 5.3 1.6 6.4 2.0 8.0 2.5 10.6 3.2 12.8 4.0 16.0 5.0
fedl2201-01 1 semiconductor ml2201?xxx 15/20 connecting ml2201 to a speaker driver ml2201 uses a d/a converter of current-output type. to connect ml2201 to a voltage-input type speaker driver, you should convert ?changes in current? output to ?changes in voltage? signal. the following samples show connections of ml2201 and msc1157 (oki speaker driver amplifier) using a resistor (rl) for conversion. sample circuit 1: at v dd = 5.0 v, msc1157?s ain amplification = 2.5 v p-p mcu ml2201 msc1157 p1.2 p1.1 p1.0 p dwn s t p i v dd aout v cc ain 430 ? 0.1 f gnd gnd 0.1 f 10 f 47 f xt stby sel vr 4.7 f sp sp +5 v +5 v clk xt sample circuit 2: at v dd = 3.0 v, msc1157?s ain amplification = 1.5 v p-p mcu ml2201 msc1157 p1.2 p1.1 p1.0 p dwn s t p i v dd aout v cc ain 510 ? 0.1 f gnd gnd 0.1 f 10 f 47 f xt stby sel vr 4.7 f sp sp +3 v +3 v clk xt
fedl2201-01 1 semiconductor ml2201?xxx 16/20 co-relationship between output voltage and the value of a resistor for current-voltage conversion is shown in the figure below. you may want to use the figure as a reference in determining a proper value for the resistor. aout voltage vs. aout output current at v dd = 5.0 v rl = 500 ? 0 1 2 3 4 5 6 012345 vaout (v) iaout (ma) rl = 200 ? rl = 5 k ? power down power down ready playing shifting to standby shifting to standby power down powe r down ready playing shifting to standby shifting to standby (1) at rl = 200 ? pro p er waveform out p ut shown. (2) at rl = 5 k ? distorted waveform and obvious p o p -noise shown.
fedl2201-01 1 semiconductor ml2201?xxx 17/20 a sample characteristics of d/a converter output current 0 1 2 3 4 5 6 7 8 0123456 v dd (v) iaout (ma) a sample characteristics : power supply voltage vs. aout output current (ta = 25c, vaout = v dd , pcm at max. level) 0 1 2 3 4 5 6 7 8 ?40 ?20 0 20 40 60 80 100 a sample characteristics : operating temperature vs. aout output current (vaout = v dd , pcm at max. level) ta ( c ) iaout (ma) v dd = 5 v v dd = 3 v 0 1 2 3 4 5 6 012345 a sample characteristics: voltage on aout pin vs. aout output current (ta = 25c, pcm at max. level) vaout (v) iaout (ma) v dd = 5 v v dd = 3 v
fedl2201-01 1 semiconductor ml2201?xxx 18/20 notes on usage type of the built-in d/a converter ml2201 has the built-in current-output type d/a converter and thus the design of analog output circuit is different from the one with a voltage-output type d/a converter (e.g. msm6650 family). ml2201?s d/a converter is designed as current attraction type with the same circuit configuration with the one used on msm9831. so, the analog output circuit is different from msm9800 family that uses a current discharge type d/a converter. (see the table below) product d/a converter type d/a converter output circuit ml2201 current output n-mos open drain msm9831 current output n-mos open drain msm9800 family current output p-mos open drain msm6650 family voltage output ? a sample circuit of connecting ml2201 and an amplifier chip d/a converter v dd gnd aout ml2201 a resistor for converting current to voltage amp direction of flowing current a sample circuit of connecting msm9800 family and an amplifier chip d/a converter v dd gnd aout msm9800 family a resistor for converting current to voltage amp direction of flowing current
fedl2201-01 1 semiconductor ml2201?xxx 19/20 package dimensions notes for mounting the surface mount type packages the surface mount type packages are very susceptible to heat in reflow mounting and humidity absorbed in storage. therefore, before you perform reflow mounting, contact oki?s responsible sales person on the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). ssop8-p-44-0.65-k 5 package material lead frame material pin treatment package weight (g) rev. no./last revised epoxy resin 42 alloy solder plating ( 5m) 0.044 typ. 1/may.12,1999 yv2
fedl2201-01 1 semiconductor ml2201?xxx 20/20 notice 1. the information contained herein can change without notice owing to product and/or technical improvements. before using the product, please make sure that the information being referred to is up-to-date. 2. the outline of action and examples for application circuits described herein have been chosen as an explanation for the standard action and performance of the product. when planning to use the product, please ensure that the external conditions are reflected in the actual circuit, assembly, and program designs. 3. when designing your product, please use our product below the specified maximum ratings and within the specified operating ranges including, but not limited to, operating voltage, power dissipation, and operating temperature. 4. oki assumes no responsibility or liability whatsoever for any failure or unusual or unexpected operation resulting from misuse, neglect, improper installation, repair, alteration or accident, improper handling, or unusual physical or electrical stress including, but not limited to, exposure to parameters beyond the specified maximum ratings or operation outside the specified operating range. 5. neither indemnity against nor license of a third party?s industrial and intellectual property right, etc. is granted by us in connection with the use of the product and/or the information and drawings contained herein. no responsibility is assumed by us for any infringement of a third party?s right which may result from the use thereof. 6. the products listed in this document are intended for use in general electronics equipment for commercial applications (e.g., office automation, communication equipment, measurement equipment, consumer electronics, etc.). these products are not authorized for use in any system or application that requires special or enhanced quality and reliability characteristics nor in any system or application where the failure of such system or application may result in the loss or damage of property, or death or injury to humans. such applications include, but are not limited to, traffic and automotive equipment, safety devices, aerospace equipment, nuclear power control, medical equipment, and life-support systems. 7. certain products in this document may need government approval before they can be exported to particular countries. the purchaser assumes the responsibility of determining the legality of export of these products and will take appropriate and necessary steps at their own expense for these. 8. no part of the contents contained herein may be reprinted or reproduced without our prior permission. copyright 2000 oki electric industry co., ltd.

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